Future lunar exploration requires advanced multi-frequency radar sounders capable of mapping geological structures and detecting volatiles. This paper presents the design of a compact, fully-digital radar sounder and the implementation of its demonstrator on the Xilinx ZCU111 Radio Frequency System-on-Chip (RFSoC) platform. Exploiting the device's Direct RF capabilities, we propose a parallelized, multiplier-free digital waveform generation architecture capable of synthesizing coherent Linear Frequency Modulated (LFM) chirps at HF (15, 60 MHz) and VHF (150 MHz) bands without requiring analog up-conversion. The design leverages a parallel Numerically Controlled Oscillator (NCO) approach to bridge the gap between the FPGA clock frequency and the mega sample-per-second RF sampling rates required for wideband operation. Experimental validation via hardware loopback confirms the high quality of the digitally generated LFM waveforms. Furthermore, the pulse compressed output shows the vertical resolution predicted by theory. Finally, the resource utilization table highlights that no DSP slices are used for signal generation, thus preserving significant logic resources for future on-board radar signal processing.

Multi-Frequency Radar Sounder Design and RFSoC Implementation for Lunar Subsurface Exploration

Bongioanni, Carlo;
2026-01-01

Abstract

Future lunar exploration requires advanced multi-frequency radar sounders capable of mapping geological structures and detecting volatiles. This paper presents the design of a compact, fully-digital radar sounder and the implementation of its demonstrator on the Xilinx ZCU111 Radio Frequency System-on-Chip (RFSoC) platform. Exploiting the device's Direct RF capabilities, we propose a parallelized, multiplier-free digital waveform generation architecture capable of synthesizing coherent Linear Frequency Modulated (LFM) chirps at HF (15, 60 MHz) and VHF (150 MHz) bands without requiring analog up-conversion. The design leverages a parallel Numerically Controlled Oscillator (NCO) approach to bridge the gap between the FPGA clock frequency and the mega sample-per-second RF sampling rates required for wideband operation. Experimental validation via hardware loopback confirms the high quality of the digitally generated LFM waveforms. Furthermore, the pulse compressed output shows the vertical resolution predicted by theory. Finally, the resource utilization table highlights that no DSP slices are used for signal generation, thus preserving significant logic resources for future on-board radar signal processing.
2026
Planetary Exploration, Radar Sounder, RFSoC, Direct RF Synthesis, FPGA
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/20.500.14252/1867
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